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New Five Nanometer Transistor Unveiled by IBM and Cohorts

IBM and its partners have developed a novel technology to build 5nm chips, based on silicon nanosheet transistors. Compared to 10nm chips using FinFET transistors, the new technology promises to deliver a 40 percent performance increase, a 75 percent power savings, or some combination of the two.

Fujitsu Unveils Circuit Design that Optimizes Deep Learning Applications

Fujitsu Laboratories has developed a circuit technology that is said to improve the energy efficiency of deep learning workloads. According to the company, it plans to commercialize the technology in 2018 as part of its Human Centric AI Zinrai initiative.

Google Reveals Technical Specs and Business Rationale for TPU Processor

Although Google’s Tensor Processing Unit (TPU) has been powering the company’s vast empire of deep learning products since 2015, very little was known about the custom-built processor. This week the web giant published a description of the chip and explained why it’s an order of magnitude faster and more energy-efficient than the CPUs and GPUs it replaces.

EU Outlines Plan to Develop Home-Grown Exascale Supercomputers

Ministers from seven European countries have signed on to a plan to develop an exascale capability based on technology developed within the EU member states. The goal is to bring up two pre-exascale supercomputers by 2020 and two full exascale systems no later than 2023.

Moore’s Law Is Breaking Down, But That’s OK

The long-predicted demise of Moore’s Law appears to be playing out. Over the last couple of years, Intel and other chipmakers have struggled to keep their semiconductor technology plans on schedule, paving the way for fundamental changes in the computer industry.