There was a time when the only thing that the high performance computing industry paid attention to was FLOPS. Indeed, for most of the history of HPC, floating point operations per second was the one true metric, and only those machines that delivered them in the largest quantities were deemed to be true supercomputers. Performance, after all, is HPCs middle name.

Intel has released its latest four-socket and eight-socket Broadwell-EX processors into the wild this week, which follows on the heels of the dual-socket Broadwell-EP chips the company launched at the end of March. The new chip family, known as the Xeon E7-8800/4400 series, are destined for scale-up servers running applications with prodigious appetites for memory and processor cores.

While there is always a lot of buzz about the latest HPC hardware architecture developments or exascale programming methods and tools, everyone agrees that in the end the only thing that counts are the results and societal impact produced by the technology. Results and impacts are coming from the scientific and industrial applications running on HPC systems. The application space is diverse ranging from astrophysics (A) to zymology (Z). So the question arises of how to effectively fund development and optimization of HPC applications to make them suitable for current petascale and future exascale systems.

Cavium has launched its latest ARM server processor, the ThunderX2, a second-generation SoC aimed at the same datacenter workloads that are currently dominated by Intels Xeon CPUs. The new chip is designed to go head-to-head with those Xeons, while at the same time get out in front of the 64-bit ARM competition from Applied Micro, Broadcom, and others.

The fourth industrial revolution is upon us. At least thats the view of German business leaders and the government, who are blazing a new path in manufacturing with the Industrie 4.0 initiative. As in the third industrial revolution, information technology will be key enabler. But what comes next will intimately link manufacturing with the internet, the ubiquitous digital platform of the 21st century, along with other advanced computer technologies. The result will be what is sometimes referred to as the smart factory.

Last week at the Google I/O conference, it was revealed the search giant has been using its own custom-built ASIC to accelerate the machine learning capabilities that now underlies much of the Google cloud. The microprocessor, known as the Tensor Processing Unit (TPU), was designed by Google engineers to speed up the TensorFlow software that the company uses to drive much of its machine learning functionality. TensorFlow began as a machine learning research project, but later moved into production, and is now deployed in an array of applications, including Google Cloud Speech, Gmail, Google Photos, and Search. According to the …